In the context of superconducting reciprocal quantum logic (RQL) circuits, phase-mode logic (PML) allows digital values to be encoded as superconducting phases of one or more Josephson junctions. For example, a logical “1” may be encoded as a high phase and a logical “0” may be encoded as a low phase. For example, the phases may be encoded as being zero radians (meaning, e.g., logical “0”) or 2π radians (meaning, e.g., logical “1”). These values persist across RQL AC clock cycles in PML because there is no requirement for a reciprocal pulse to reset the Josephson junctions phase. In contrast to PML, in wave-pipelined logic (WPL), a logical “1” is encoded as a positive single flux quantum (SFQ) pulse followed by a reciprocal negative pulse, whereas a logical “0” is encoded as the absence of either such pulse.

One example includes a reciprocal quantum logic (RQL) non-destructive readout (NDRO) gate that includes a body circuit and one or more tail circuits connected to the body circuit. The body circuit has at least one single flux quantum (SFQ) logical input. The body circuit is configured to store at least one logical state. Each tail circuit in the NDRO gate includes a tail input inductor connected between an NDRO read-enable input port and the body circuit and configured to receive an SFQ pulse NDRO read-enable signal on the NDRO read-enable input port, a tail Josephson junction connected between the body circuit and a circuit ground, and a tail output inductor connected between the body circuit and an NDRO output port and configured to transmit an SFQ pulse NDRO output signal based on the stored logical state and the NDRO read-enable signal without affecting the stored logical state.