Pulse generator Josephson junctions JP1 and JP2, fed with an AC bias from AC bias source 1402, aid in the inversion process at escape Josephson junction J3. Pulse generator Josephson junctions JP1 and JP2 are biased to spontaneously trigger positively and reciprocally every clock cycle. When selector input S is asserted “high” with a positive SFQ pulse, Josephson junction J2 triggers, splitting bias current toward both left and right paths. This bias current, combined with clock pulse current via Josephson junctions JP1 and JP2, causes escape Josephson junction J3 to trigger, eliminating provision of a pre-critical bias current to Josephson junction J4A that would otherwise permit SFQ pulses applied at input A to propagate left and out through output O. The pulse generator portion of circuit 1402 formed from Josephson junctions JP1 and JP2 and AC bias source 1402, combined with escape Josephson junction J3, effectively performs a NOT-S inversion of the selector signal in order to provide multiplexer functionality. On the left side of circuit 1400, when selector input S is asserted, bias current from Josephson junction J2 applies a pre-critical bias current to Josephson junction J4B, thus permitting SFQ pulses applied at input B to triggers Josephson junction J4B, in turn triggering Josephson junction J5B, and sending the B-input pulses out the output.