Similarly, FIG. 7C shows examples of SC 64QAM blocking in 802.11ad and 802.11REVmc. In 802.11ad, with 64QAM, one 672 bits codeword after modulation becomes one 112 symbols codeword. Each 448 symbols data block is constructed from four 112 symbols codewords, namely, 448=112+112+112+112. However, in 802.11REVmc, one 624 bits codeword after modulation becomes one 104 symbols codeword. As a result, the blocking process becomes more complex: every 13 data blocks are constructed from 56 codewords, and each data block is constructed from five or six codewords.
As well, because the rate 7/8 LDPC code introduced in 802.11 REVmc has a different codeword length (624 bits) from the 672 bits LDPC codewords specified in 802.11ad, this difference makes it more complex in encoding the source words in a transmitter and in decoding of the codewords in a receiver.
New Codes
In one embodiment of the present disclosure, a 1×K source word row vector ū may be encoded, at the LDPC encoder 204, to a 1×N codeword vector c=ū·G is a K×N generator matrix. G may be derived from a (N?K)×N parity check matrix Hn=[P(n?k)×kI(n?k)] with a lifting factor Z. P(n?k)×k is a binary matrix and I(n?k) is the identify matrix of order N?K. Hn comprises a plurality of submatrices, and each submatrix has a size of Z×Z. At least one submatrix in Hn comprises m1 diagonals of “1”, and m1. is an integer>=2.
G may then be derived from H, namely, G=[IkPT]. “T” denotes the matrix P(n?k)×k transpose.
