WLAN front-end
地域：
MA
MA Woburn
摘要
In some embodiments, a wireless local area network (WLAN) front-end can be implemented on a semiconductor die having a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for WLAN transmit operation associated with a frequency range. The semiconductor die can further include a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die can further include a transmit/receive switch implemented on the semiconductor substrate and configured to support the transmit and receive operations.
說明書
This application is a continuation of U.S. application Ser. No. 14/989,117 filed Jan. 6, 2016, entitled FRONT-END INTEGRATED CIRCUIT FOR WLAN APPLICATIONS, which claims priority to U.S. Provisional Application No. 62/100,659 filed Jan. 7, 2015, entitled HIGHLY INTEGRATED SINGLE CHIP FRONT-END IC BASED ON SIGE BICMOS, the benefits of the filing dates of which are hereby claimed and the disclosures of which are hereby expressly incorporated by reference herein in their entirety.
The present disclosure relates to front-end designs for radio-frequency (RF) applications.
Many electronic devices include circuits and components configured to provide wireless local area network (WLAN) functionality. Such a WLAN functionality allows an electronic device to communicate with one or more other devices in a wireless manner.
According to a number of implementations, the present disclosure relates to a semiconductor die that includes a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for wireless local area network (WLAN) transmit operation associated with a frequency range. The semiconductor die further includes a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die further includes a transmit/receive switch implemented on the semiconductor substrate and configured to facilitate the transmit and receive operations.
權(quán)利要求
What is claimed is:1. A semiconductor die comprising:a silicon germanium substrate; a first amplifier implemented on the silicon germanium substrate and configured for transmit operation, the first amplifier including a first stage, a second stage, and a third stage, each stage including an amplifying transistor configured to receive a respective input signal through its base and generate a respective amplified signal through its collector, such that an input signal for the first amplifier is provided to the base of the first amplifying transistor, and an amplified signal from the first amplifier is provided through the collector of the third amplifying transistor; and a second amplifier implemented on the silicon germanium substrate and configured for receive operation. 2. The semiconductor die of claim 1 wherein the first amplifier is a power amplifier. 3. The semiconductor die of claim 1 wherein the second amplifier is a low-noise amplifier. 4. The semiconductor die of claim 1 further comprising a switch implemented on the silicon germanium substrate and configured to support the transmit and receive operations with the first and second amplifiers, respectively. 5. The semiconductor die of claim 1 wherein each of the transmit operation and the receive operation includes a respective wireless local area network operation. 6. The semiconductor die of claim 5 wherein the wireless local area network transmit and receive operations include a frequency range of 4.9 GHz to 5.9 GHz. 7. The semiconductor die of claim 1 wherein the silicon germanium substrate is configured to allow implementation of silicon germanium BiCMOS process technology. 8. The semiconductor die of claim 1 further comprising a CMOS controller configured to provide control functionality for at least the first amplifier. 9. The semiconductor die of claim 1 further comprising one or more bias circuits configured to provide bias signals to some or all of the first, second and third stages of the first amplifier. 10. The semiconductor die of claim 1 further comprising a power detector configured to measure power associated with the first amplifier. 11. The semiconductor die of claim 1 wherein the second amplifier is implemented in a cascode configuration with a first transistor and a second transistor. 12. The semiconductor die of claim 11 wherein the first transistor is configured to operate as a common source device, and the second transistor configured to operate as a common gate device, such that an input signal is provided to a gate of the first transistor and a partially amplified signal is output through a drain of the first transistor, and the partially amplified signal from the drain of the first transistor is provided to a source of the second transistor for further amplification and output through a drain of the second transistor. 13. The semiconductor die of claim 12 wherein the second amplifier includes a bypass circuit implemented between the gate of the first transistor and the drain of the second transistor, the bypass circuit including first and second switch transistors arranged in series with an attenuation resistance implemented between the first and second switch transistors. 14. A radio-frequency module comprising:a packaging substrate configured to receive a plurality of components; and a front-end integrated circuit implemented on a die that is mounted on the packaging substrate, the die including a silicon germanium substrate and a first amplifier implemented on the silicon germanium substrate and configured for transmit operation, the first amplifier including a first stage, a second stage, and a third stage, each stage including an amplifying transistor configured to receive a respective input signal through its base and generate a respective amplified signal through its collector, such that an input signal for the first amplifier is provided to the base of the first amplifying transistor, and an amplified signal from the first amplifier is provided through the collector of the third amplifying transistor, the die further including a second amplifier implemented on the silicon germanium substrate and configured for receive operation. 15. The radio-frequency module of claim 14 wherein the transmit and receive operations include wireless local area network transmit and receive operations, respectively, in a frequency range of 4.9 GHz to 5.9 GHz. 16. A wireless device comprising:a transceiver; a front-end integrated circuit in communication with the transceiver and implemented on a die, the die including a silicon germanium substrate and a first amplifier implemented on the silicon germanium substrate and configured for transmit operation, the first amplifier including a first stage, a second stage, and a third stage, each stage including an amplifying transistor configured to receive a respective input signal through its base and generate a respective amplified signal through its collector, such that an input signal for the first amplifier is provided to the base of the first amplifying transistor, and an amplified signal from the first amplifier is provided through the collector of the third amplifying transistor, the die further including a second amplifier implemented on the silicon germanium substrate and configured for receive operation; and one or more antennas in communication with the die and configured to support the transmit and receive operations. 17. The wireless device of claim 16 wherein the transmit and receive operations include wireless local area network transmit and receive operations, respectively, in a frequency range of 4.9 GHz to 5.9 GHz. 18. The wireless device of claim 17 further comprising a cellular front-end integrated circuit and one or more cellular antennas configured for cellular transmit and receive operations.
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