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WLAN front-end

專利號
US10869362B2
公開日期
2020-12-15
申請人
SKYWORKS SOLUTIONS, INC.(US CA Irvine)
發(fā)明人
Chun-Wen Paul Huang; Lui Lam; Mark M. Doherty; Michael Joseph McPartlin
IPC分類
H04W84/12; H03F3/193; H03F3/195; H03F3/24; H04B7/0413; H01L21/76; H03F3/21; H03F3/191; H03F3/72
技術(shù)領域
lna,feic,wlan,die,can,in,be,band,devm,rf
地域: MA MA Woburn

摘要

In some embodiments, a wireless local area network (WLAN) front-end can be implemented on a semiconductor die having a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for WLAN transmit operation associated with a frequency range. The semiconductor die can further include a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die can further include a transmit/receive switch implemented on the semiconductor substrate and configured to support the transmit and receive operations.

說明書

In some embodiments, the frequency range can include a WLAN frequency range of 4.9 GHz to 5.9 GHz.

In some embodiments, the semiconductor substrate can be configured to allow implementation of silicon germanium (SiGe) BiCMOS process technology. The power amplifier can be implemented as a SiGe power amplifier having a plurality of stages. The plurality of stages can include a first stage having a first amplifying transistor, a second stage having a second amplifying transistor, and a third stage having a third amplifying transistor. Each of the first amplifying transistor, the second amplifying transistor, and the third amplifying transistor can be configured to receive an input signal through its base and generate an amplified signal through its collector, such that an input radio-frequency (RF) signal for the SiGe power amplifier is provided to the base of the first amplifying transistor, and an amplified RF signal from the SiGe power amplifier is obtained through the collector of the third amplifying transistor.

In some embodiments, the semiconductor die can further include one or more matching network circuits implemented before the plurality of stages, between stages, and/or after the plurality of stages.

In some embodiments, the semiconductor die can further include a CMOS controller configured to provide control functionality for the SiGe power amplifier.

In some embodiments, the semiconductor die can further include one or more bias circuits configured to provide bias signals to the plurality of stages. At least some of the one or more bias circuits can be configured to provide either or both of on-die temperature and voltage compensation functionalities.

權(quán)利要求

1
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