Optionally, the server 40 may further include a network interface 404 and a power module 405.
The processor 401 may be a digital signal processing (Digital Signal Processing, DSP) chip.
The memory 402 is configured to store an instruction. In specific implementation, the memory 402 may use a read-only memory (English: Read-Only Memory, ROM for short) or a random access memory (English: Random Access Memory, RAM for short). In this embodiment of the present disclosure, the memory 402 is configured to store code of a video stream transmission program.
The transceiver 403 is configured to transmit and receive a signal.
The network interface 404 is used by the server 40 to perform data communication with another device. The network interface 404 may be a wired interface or a wireless interface.
The power module 405 is configured to supply power to each module of the server 40.
The processor 401 is configured to call the instruction stored in the memory 402 to perform the following operations: