In the period from time T2 to time T3 between time T1 and time T4, the pixel control circuit 20 controls the control signal pTX2 supplied to the control line 12 on each row from the low level to the high level. Thereby, the transfer transistor M2 is turned on, and charge held in the charge holding portion MEM at this time, that is, the charge generated in the exposure period of the previous frame is transferred from the charge holding portion MEM to the floating diffusion portion FD. As a result, the floating diffusion portion FD that is also the input node of the amplifier unit has a voltage in accordance with the capacitance value and the amount of the charge transferred from the charge holding portion MEM. In such a way, a signal based on the charge generated in the exposure period of the previous frame is output from the amplifier transistor M4 to the drain of the select transistor M5 and the drain of the select transistor M6.
At time T4, the pixel control circuit 20 controls the control signal pTX1 supplied to the control line 12 on each row from the low level to the high level. Thereby, the transfer transistors M1 are turned on in all the pixels P. Thereby, charge generated in the photoelectric converter PD in the period from time T1 to time T4 is transferred to the charge holding portion MEM. That is, after time T4, the charge generated in the period from time T1 to time T4 is held by the charge holding portion MEM.