It is to be noted that pixel signals from pixels in two rows may be read out simultaneously by reading out the pixel signals from pixels in one row to the first vertical signal lines VL1 and reading out the pixel signals from pixels in the other row to the second vertical signal lines VL2. In this case, two arithmetic units 50 may be disposed in correspondence to each pixel column so as to simultaneously (concurrently) execute signal processing on the pixel signal output on the first vertical signal line VL1 and the pixel signal output on the second vertical signal line VL2 and output the pixel signals having undergone the concurrent signal processing to the control unit 4. In the example presented in FIG. 3, the vertical control unit 70 may, for instance, set the first selection unit 16 in an ON state at the pixel 10 (1, 1) in the first row and the second selection unit 17 in an OFF state at the pixel 10 (1, 1), and also set the first selection unit 16 in an OFF state at the pixel 10 (2, 1) in the second row and the second selection unit 17 in an ON state at the pixel 10 (1, 1). In this situation, the pixel signal from the pixel 10 (1, 1) will be read out to the first vertical signal line VL1 and the pixel signal from the pixel 10 (2, 1) will be read out to the second vertical signal line VL2. Once a simultaneous readout for the first row and the second row is completed, a simultaneous readout will be executed to read out pixel signals from the pixels in the third row and the fourth row. Subsequently, simultaneous readouts from the pixels in pairs of rows, each made up with an odd-numbered row and an even-numbered row adjacent to each other, will be executed in sequence. Through this process, pixel signals from the pixels in two rows can be read out simultaneously.
