The arithmetic units 50 (50a through 50c) are each disposed in correspondence to a first vertical signal line VL1 (among VL1a through VL1c) and a second vertical signal line VL2 (among VL2a through VL2c). The arithmetic units 50a through 50c each execute an arithmetic operation to add together pixel signals from a plurality of pixels disposed consecutively along the column direction, as does the arithmetic unit 50 shown in FIG. 3. The arithmetic unit 50b also adds together the pixel signals from the nine pixels arranged over three rows× three columns, as will be explained later, in addition to adding together the pixel signals from the plurality of pixels disposed consecutively along the column direction, as described above. In addition, the A/D conversion units (80a through 80c) are each disposed in correspondence to one of the arithmetic units 50 (50a through 50c). The output unit 90 is disposed as a common unit shared among the plurality of A/D conversion units 80. It is to be noted that FIG. 6 shows nine pixels 10, i.e., pixels 10 (1, 1) through 10 (3, 3), with the pixel 10 arranged at the upper left corner designated as the first row/first column pixel 10 (1, 1) and the pixel 10 arranged at the lower right corner designated as the third row/third column pixel 10 (3, 3).
