Since switching control signal TG1 can be active (see, e.g., FIG. 8), switch K1 can be controlled by switching control signal TG1 to be turned off, and current source k1Vin may begin to charge capacitor C3. At time t2, voltage Vcot_ramp1 on capacitor C3 can rise to be greater than master on-time reference signal Vcot_ref1, and thus master on-time control signal Cot1 generated by comparator cmp2 may be active. However, since compensation signal Error+ is still greater than ripple signal Error? at this time (e.g., set signal set is still active), shield circuit 138 can shield the effective master on-time control signal Cot1. Therefore, reset signal res1 may still controlled to be inactive even if the on-time of power switch Q1 has reached the constant on time, such that power switch Q1 continues to be turned on, and rectifier switch Q2 continues to be turned off. At this time, inductor current Is1 of master interleaved parallel branch 11 can continue rising.
