At time t6, compensation signal Error+ may be greater than ripple signal Error?, and set signal set may be active. Thus, turn-on trigger signal set2 generated by phase distribution circuit 135 may be active. For example, phase distribution circuit 135 can alternately generate turn-on trigger signals set1 and set2. Therefore, switching control signal TG2 generated by logic circuit 137 is active and switching control signal BG2 generated by logic circuit 137 may be inactive, thereby controlling power switch Q3 to be turned on, and controlling rectifier switch Q4 to be turned off. At this time, inductor current Is2 of slave interleaved parallel branch 12 may begin to increase, and inductor current Is1 of master interleaved parallel branch 11 can continue decreasing.

At time t6, switching control signal TG2 may be active, such that switch K2 in slave on-time control circuit 134 is controlled to be turned off, and current source k2Vin begins to charge capacitor C4. At time t7, voltage Vcot_ramp2 on capacitor C4 can rise to be greater than slave on-time reference signal Vcot_ref2, and then slave on-time control signal Cot2 generated by comparator cmp4 may be active. Thus, switching control signal TG2 generated by logic circuit 137 can be inactive and switching control signal BG2 generated by logic circuit 137 may be active, thereby controlling power switch Q3 to be turned off and controlling rectifier switch Q4 to be turned on. At this time, inductor current Is2 of slave interleaved parallel branch 12 may begin to decrease, and inductor current Is1 of master interleaved parallel branch 11 can continue decreasing.