Moreover, a feature of the present invention is about how the controller 120 controls the flash memory module 130, which can be referred to
In the present invention, the management on the erased block is independent from the main control command of the host device 200, and is performed according to the timestamp of erased blocks. Hence, even if the host device 200 does not issue the main control command to the controller 120, events (such as an alternative operation of the erased blocks as well as the garbage collection operation) may still be triggered due to the timestamp of the erased blocks in the spare pool 138 exceeding the threshold. Hence, in an embodiment, the controller 120 may issue the following consecutive command sequences to the flash memory chip 130_1-130_N without receiving any access command from the host device 200:
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