Synchronization of concurrent computation engines
摘要
說明書
In various examples, a procedure for generating instructions for the integrated circuit device can include identifying each dependency in the data flow graph (or another representation of sequences of operations for the integrated circuit), and including set checkpoint and corresponding wait checkpoint instructions for each dependency. For example, the procedure can include walking the dataflow graph, and identifying each occurrence of an edge where the edge starts at a node that includes operations for one execution engine and ends at a node that includes operations for a different execution engine. As a further example, the procedure can assign a checkpoint value to each such edge. Checkpoints can be assigned, for example, using a numerical identifier in a specified checkpoint register. When generating instructions according to the data flow graph, the procedure can include, for each assigned checkpoint value in a checkpoint register, adding a “checkpoint set” instruction to the instructions for the node at the start of the edge, and a “checkpoint wait” instruction for the node at the end of the edge. For example, the “checkpoint set” instruction can be a last instruction of a set of instructions generated for the node at the start of the edge, and the “checkpoint wait” instruction can be a first instruction of the instructed generated for the node at the end of the edge. The instruction generation procedure may handle an arbitrary number of input or output edges. The only restriction on the dataflow graph is that it does not contain directed cycles; that is, repetitions of nodes and edges in the sequences of the graph (e.g., loops in the graph).
