Synchronization of concurrent computation engines
摘要
說(shuō)明書(shū)
The integrated circuit device may have a fixed or limited number of checkpoint registers. The checkpoint registers may be hardware registers that have the ability to perform atomic set, increment, decrement, and comparison operations. Execution engines may set values (i.e., a checkpoints) in the checkpoint registers and may wait on conditions associated with values in the checkpoint registers. In accordance with various aspects of the present disclosure, when a value is set in a checkpoint register, setting the value may include writing a particular value, incrementing by an arbitrary number a value previously written in the register, or decrementing by an arbitrary number a value previously written in the register. It should be understood that as used herein, unless noted otherwise, the term “set” when used to describe writing a value to a checkpoint register may include any of the writing a particular value, incrementing by an arbitrary number a value previously written in the register, or decrementing by an arbitrary number a value previously written in the register.
