In the following description, various examples will be described. For purposes of explanation, specific configurations and details are set forth in order to provide a thorough understanding of the examples. However, it will also be apparent to one skilled in the art that the examples may be practiced without the specific details. Furthermore, well-known features may be omitted or simplified in order not to obscure the examples being described.
FIG. 1 is a diagram illustrating an example dataflow graph 100. The dataflow graph 100 can be generated, for example by a compiler, and can represent sequences of operations to be performed by an integrated circuit device. The integrated circuit device can include multiple execution engines, which are also referred to herein as computation engines. Examples of types of execution engines the device can have include a computational array (also referred to herein as a an array of processing engines, a computation engine executing an activation function, a computation engine executing a pooling operation, and a direct memory access (DMA) engine, among other examples.
