The example accelerator 900 further includes DRAM controllers 942a-942k for communicating with an external memory. The external memory is implemented, in this example, using DRAM 930. In the illustrated example, the accelerator 900 includes k DRAM controllers 942a-942k, each of which may be able to communicate with an independent set of banks of DRAM. In other examples, other types of RAM technology can be used for the external memory. The DRAM controllers 942a-942k can also be referred to as memory controllers.
In various examples, input data and/or program code for the accelerators 902a-902n can be stored in the DRAM 930. Different programs can cause the accelerator engines 902a-902n to perform different operations. For example, when one of the accelerators is a neural network accelerator, one program can configure the neural network accelerator to perform speech recognition while another program can configure the neural network accelerator to perform image recognition. In various examples, different accelerator engines 902a-902n can be programmed with different programs, so that each performs a different set of operations. In various examples, the processors 948a-948s can manage moving of program code from the DRAM 930 to the accelerator engines 902a-902n.