Movement of data in the accelerator 900 can be managed by one or more processors 948a-948s, which can also be referred to as data management processors. In the example of FIG. 9, the accelerator 900 includes s processors 948a-948s incorporated into (e.g., on the same silicon die) the device. In other examples, the processors 948a-948s can be external to the accelerator 900 (e.g., on a different die and/or in a different package). In some examples, the processors 948a-948s can manage the movement of data from I/O devices 932 to the accelerator engines 902a-902n or the DRAM 930. For example, input data may be located at an I/O device 932 or in processor memory, and the processors 948a-948s can move the input from the I/O device 932 or processor memory into an accelerator or into DRAM 930. As another example, program code for the accelerator engines 902a-902n may be located on an I/O device 932 or in processor memory.
