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Synchronization of concurrent computation engines

專利號(hào)
US11175919B1
公開日期
2021-11-16
申請(qǐng)人
Amazon Technologies, Inc.(US WA Seattle)
發(fā)明人
Ilya Minkin; Ron Diamant; Drazen Borkovic; Jindrich Zejda; Dana Michelle Vantrease
IPC分類
G06F9/30; G06F9/35; G06F13/28; G06F9/38; G06F9/52; G06N3/06
技術(shù)領(lǐng)域
checkpoint,engine,execution,register,ckpt1,engines,in,wait,value,can
地域: WA WA Seattle

摘要

Integrated circuit devices and methods for synchronizing execution of program code for multiple concurrently operating execution engines of the integrated circuit devices are provided. In some cases, one execution engine of an integrated circuit device may be dependent on the operation of another execution engine of the integrated circuit device. To synchronize the execution engines around the dependency, a first execution engine may execute an instruction to set a value in a register while a second execution engine may execute an instruction to wait for a condition associated with the register value.

說明書

In the example of FIG. 1, connections between nodes, which can also be referred to as edges, can represent data and/or resource dependencies between the nodes. A data dependency can occur, for example, when an execution engine uses the output of another execution engine as in input for a computation. A resource dependency can occur, for example, when one execution engine needs to use a memory location that second execution engine is also using. For example, the second execution may need to write a value to the memory location, and the first execution engine may need to read the value and use the value in a computation. As another example, the second execution engine may be reading or writing a value to a memory location, and the first execution engine may (due, for example, to limited memory being available) need to write a value to the same memory location.

In various examples, each node in the graph 100 includes at least one input edge, representing inputs to the operation being performed at the node, or at least one output edge, representing an output of the operation performed at the node. For example, edge 142 from node 140 and edge 132 from node 130 each indicate that the results from the operations of node 140 and node 130 are inputs to node 110. As a further example, edge 112 from node 110 to node 120 indicates that the result of the operation of node 110 is the input to the operation of node 120. As a further example, the edge 122 from node 120 to node 150 indicates that the result of the operation at node 120 is the input to the operation at node 150.

權(quán)利要求

1
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