FIG. 6A depicts an example of a hyperthread's view of hardware on a single node. In this example, a node has four hyperthreads denoted H1 (602) through H4 (608). Each hyperthread can access all portions of physical shared memory 612. Physical shared memory 612 is linear, labeled location 0 through a maximum amount, “max.” The node also includes three levels of cache (610).
FIG. 6B depicts an example of a hyper-kernel's view of hardware on an example system. In this example, three nodes (652-656) are included in an enterprise supercomputer. Each of the three nodes has four hyperthreads, a physical shared memory, and cache (i.e., each node is an embodiment of node 600 shown in FIG. 6A). A hyperthread on a given node (e.g., node 652) has a view that is the same as that shown in FIG. 6A. However, the hyper-kernel is aware of all of the resources on all of the nodes (i.e., the hyper-kernel sees twelve hyperthreads, and all of the physical shared memory). In the example shown in FIG. 6B, a given hyperthread (e.g., hyperthread 658, “H1-4”) is labeled with its node number (e.g., “1”) followed by a hyperthread number (e.g., “4”).
