As shown in this example, nodes 1352 and 1354 communicate with each other (e.g., over an interconnect), for example, migrating resources between each other. In this example, the nodes are also configured to communicate with persistent memory array 1356, which is an example of a network-attached memory. The NAM and the nodes of the TidalPod communicate using a cache coherency protocol, described in further detail herein.
FIG. 14 illustrates an example embodiment of a network-attached memory appliance. One example implementation of a NAM is as follows. The NAM (1402) includes a number of flash memory chips (e.g., memory chip 1404) arranged in a 2D (two-dimensional) array on a board. In this example, the memory chips are arranged in banks and rows. The memory chips are connected on a memory bus (1406). The memory bus allows a processor (1408) to put out addresses to a memory controller 1410 (e.g., address specifying bank X, chip Y, page Z), which is then configured to return the appropriate page from the specified combination of bank/chip. For example, the memory controller takes the total number of chips, divides that by the number of pages on a chip, divided by the number of rows, etc. to return the appropriate page.
