The input data of each operation of the set of operations may be of integer type, float type, or hybrid-float type. In case of a float type input, the hardware accelerator may further comprise a unit that is configured to perform a float-to-integer casting of the input data before being input to the computation unit (which is an integer unit). In case of a hybrid-float type, each computation unit of the set of computation units may comprise integer elements that process the mantissa part of the input operands and an x-bit exponent element that provides the exponent which may be shared between the input operands. This may enable to execute the operation fast in integer arithmetic so that at the end the results may also share the exponent of the input operands. Thus, a user is experiencing I/O data in floating point, but the hardware is operating in integer.

The input data of each operation of the set of operations may be represented by a number of bits Nb. The number of bits that represents the input data of the first executed operation of the set of operations may be N1. If Nb of each operation of the remaining operations of the set of operations is smaller than or equal to N1, the selected computation unit of the first operation may be used to execute the remaining operations of the set of operations, e.g., the method (excluding steps 805 and 807) may be repeated for each further operation of the set of operations using the selected computation unit. If Nb of any operation of the set of operation may be higher than N1, the method may be repeated such that a computation unit is selected for each operation execution.