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Soft-decision input generation for data storage systems

專利號
US11175983B2
公開日期
2021-11-16
申請人
Western Digital Technologies, Inc.(US CA San Jose)
發(fā)明人
Guangming Lu; Kent D. Anderson; Anantha Raman Krishnan; Shafa Dahandeh
IPC分類
G06F11/10
技術(shù)領(lǐng)域
bit,llr,memory,decision,read,may,in,reads,page,soft
地域: CA CA San Jose

摘要

An error management system for a data storage device can generate soft-decision log-likelihood ratios (LLRs) using multiple reads of memory locations. Bit patterns provided by multiple reads of reference memory locations can be counted and used to generate probability data that is used to generate possible LLR values for decoding target pages. Possible LLR values are stored in one or more look-up tables.

說明書

FIG. 6 is a flow chart illustrating an embodiment of a process 600 for decoding a reference bit stream using hard-decision input, which may be performed as an initial, or early, stage of calibration (e.g., as part of block 502 in FIG. 5A or block 512 in FIG. 5B). The process 600 includes reading the reference memory location/page using a default voltage read level. For example, in a 3-read scheme, the default read level may correspond to the intermediate read level. At block 604 it is determined whether the page can be decoded using the default read level to provide hard-decision input. If so, then the process 600 is complete, as the reference page can therefore be correctly decoded. If the page cannot be decoded using hard-decision input, the process 600 includes attempting to decode the page using higher and/or lower voltage read levels, wherein the process 600 terminates upon successful decoding. In certain embodiments, the process 600 loops until the page can be decoded successfully using hard-decision input. Upon completion of the process 600, further calibration steps may be performed, as discussed herein.

Multi-Read Approach—Perform Multi-Read on Reference Data

權(quán)利要求

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