With further reference to FIG. 5A, once the reference bit stream stored in the reference memory location has been determined, the process 500A includes performing multiple reads on the reference data at block 504. Similarly, in FIG. 5B, in block 514 the process 500B performs a plurality reads of the reference location at a plurality of voltage read levels to obtain a plurality of first bit patterns, at least some of which are correlated with bit values of the reference bit stream. Such reads may be performed in order to generate a plurality of bit streams corresponding to values returned in connection with the plurality of reads. Once the multiple reads are completed, the process 500A includes calculating LLR values based on comparisons of the multiple-read values to the correct reference data at block 506. For example, the raw bits returned from the multiple reads may be combined to form cell-by-cell bit patterns, as shown in the bottom three rows of the columns of Table A below. Table A shows example bit streams obtained through reads of a reference memory location at three different read voltage levels (R0, R1, R2). The top row of bits reflects the correct data stored in the reference memory location. The three voltage read levels may illustratively correspond to those shown in FIG. 4, wherein the three voltage read levels divide the relative distribution spectrum into four zones represented by 3-bit bit patterns.
TABLE A
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