A computer-implemented method, according to one embodiment, is for enabling erasure code protection for storage units. The computer-implemented method includes, for erasure code stripes in the storage units: selecting strips from each storage unit for a given erasure code stripe such that the given erasure code stripe includes at most one strip from a high failure rate region of the respective storage unit, where each of the storage units include high failure rate regions and low failure rate regions. The selected strips are organized such that a number of each strip in the given erasure code stripe is offset from the remaining strips by an amount that is greater than a total number of strips in the high failure rate regions. The organized selected strips are further mapped to form the given erasure code stripe such that the high failure rate regions on each storage unit are mapped to one or more sequentially numbered strips, and the low failure rate regions are mapped to additional sequentially numbered strips.

An erasure code protected storage system, according to another embodiment, includes: a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. Moreover, the logic is configured to, for erasure code stripes in storage units: perform the foregoing method.

A computer program product, according to yet another embodiment, is for enabling erasure code protection for storage units. The computer program product includes a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processor to cause the processor to, for erasure code stripes in the storage units: perform the foregoing method.