In another general embodiment, an erasure code protected storage system includes: a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. Moreover, the logic is configured to, for erasure code stripes in storage units: perform the foregoing method.

In yet another general embodiment, a computer program product is for enabling erasure code protection for storage units. The computer program product includes a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processor to cause the processor to, for erasure code stripes in the storage units: perform the foregoing method.

FIG. 1 illustrates an architecture 100, in accordance with one embodiment. As shown in FIG. 1, a plurality of remote networks 102 are provided including a first remote network 104 and a second remote network 106. A gateway 101 may be coupled between the remote networks 102 and a proximate network 108. In the context of the present architecture 100, the networks 104, 106 may each take any form including, but not limited to a local area network (LAN), a wide area network (WAN) such as the Internet, public switched telephone network (PSTN), internal telephone network, etc.

In use, the gateway 101 serves as an entrance point from the remote networks 102 to the proximate network 108. As such, the gateway 101 may function as a router, which is capable of directing a given packet of data that arrives at the gateway 101, and a switch, which furnishes the actual path in and out of the gateway 101 for a given packet.