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Endurance enhancement scheme using memory re-evaluation

專利號(hào)
US11176036B2
公開(kāi)日期
2021-11-16
申請(qǐng)人
International Business Machines Corporation（US NY Armonk）
發(fā)明人
Charles J. Camp; Timothy J. Fisher; Aaron D. Fry; Nikolas Ioannou; Ioannis Koltsidas; Roman A. Pletka; Sasa Tomic
IPC分類
G06F12/00; G06F12/02
技術(shù)領(lǐng)域
memory,block,may,in,or,be,storage,retire,volatile,stripe
地域： NY NY Armonk

摘要

An apparatus, according to one embodiment, includes non-volatile memory configured to store data, and a controller and logic integrated with and/or executable by the controller, the logic being configured to: determine, by the controller, that at least one block of the non-volatile memory and/or portion of a block of the non-volatile memory meets a retirement condition, re-evaluate, by the controller, the at least one block and/or the portion of a block to determine whether to retire the at least one block and/or the portion of a block, indicate, by the controller, that the at least one block and/or the portion of a block remains usable when a result of the re-evaluation is not to retire the block, and indicate, by the controller, that the at least one block and/or the portion of a block is retired when the result of the re-evaluation is to retire the block.

說(shuō)明書

Moreover, the controller 108 may be configured and/or programmable to perform or control some or all of the methodology presented herein. Thus, the controller 108 may be considered to be configured to perform various operations by way of logic programmed into one or more chips, modules, and/or blocks; software, firmware, and/or other instructions being available to one or more processors; etc., and combinations thereof.

Referring still to FIG. 1, each memory controller 108 is also connected to a controller memory 110 which preferably includes a cache which replicates a non-volatile memory structure according to the various embodiments described herein. However, depending on the desired embodiment, the controller memory 110 may be battery-backed DRAM, phase-change memory PC-RAM, MRAM, STT-MRAM, etc., or a combination thereof.

As previously mentioned, memory card 100 may be implemented in various types of data storage systems, depending on the desired embodiment. FIG. 2 illustrates a data storage system architecture 200 according to an exemplary embodiment which is in no way intended to limit the invention. Moreover, it should be noted that the data storage system 220 of FIG. 2 may include various components found in the embodiment of FIG. 1.

權(quán)利要求

1
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