As an option, the present method 500 may be implemented in conjunction with features from any other embodiment listed herein, such as those described with reference to the other FIGS. However, such method 500 and others presented herein may be used in various applications and/or in permutations which may or may not be specifically described in the illustrative embodiments listed herein. Further, the method 500 presented herein may be used in any desired environment. Thus FIG. 5 (and the other FIGS.) may be deemed to include any possible permutation. It should be noted that, according to some embodiments, any one or more of the operations presented in method 500 may be performed by a GPP (e.g., see 112 of FIG. 1) and/or a controller (e.g., see 108 of FIG. 1) and logic integrated with and/or executable by the controller.

Referring now to FIG. 5, method 500 includes determining that a unit of memory meets a retirement condition. See operation 502. As previously mentioned, the retirement condition may correspond to program errors, erase errors, a RBER above a threshold for a given read operation (e.g., a page read), etc.

According to one approach, the non-volatile memory may include NAND Flash memory, but is in no way limited thereto. Again, it should be understood that various embodiments herein can be implemented with a wide range of memory mediums, including for example NVRAM technologies such as NAND Flash memory, NOR Flash memory, phase-change memory (PCM), magnetoresistive RAM (MRAM) and resistive RAM (RRAM) as would be appreciated by one skilled in the art upon reading the present description.