FIG. 2 illustrates a partial flow chart of a conventional electronic device operating in the inclusive mode.
FIG. 3 illustrates a partial flow chart of a conventional electronic device operating in the exclusive mode.
FIG. 4 illustrates a block diagram of an electronic device according to an embodiment of the present disclosure.
FIG. 5 illustrates a flow chart of a cache management method according to an embodiment of the present disclosure.
FIG. 6 illustrates a flow chart of step S540 in FIG. 5 according to an embodiment of the present disclosure.
FIG. 7 illustrates a block diagram of an electronic device according to another embodiment of the present disclosure.
DETAILED DESCRIPTION OF THE EMBODIMENTS
The following description is written by referring to terms of this technical field. If any term is defined in this specification, such term should be explained accordingly. In addition, the connection between objects or events in the below-described embodiments can be direct or indirect provided that these embodiments are practicable under such connection. Said “indirect” means that an intermediate object or a physical space exists between the objects, or an intermediate event or a time interval exists between the events.
