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Integration of application indicated minimum time to cache for a two-tiered cache management mechanism

專利號(hào)
US11176057B2
公開日期
2021-11-16
申請(qǐng)人
INTERNATIONAL BUSINESS MACHINES CORPORATION(US NY Armonk)
發(fā)明人
Lokesh Mohan Gupta; Matthew G. Borlick; Beth Ann Peterson; Kyler A. Anderson
IPC分類
G06F12/123; G06F12/0891; G06F12/0893
技術(shù)領(lǐng)域
cache,scm,retention,minimum,dram,tracks,track,lru,in,time
地域: NY NY Armonk

摘要

An indication is received from a host application of a first minimum retention time in a cache comprising a first type of memory and a second type of memory for a first plurality of tracks, wherein the first minimum retention time is not indicated for a second plurality of tracks. Based on the first minimum retention time, a second minimum retention time is set for the first plurality of tracks for the first type of memory and a third minimum retention time is set for the first plurality of tracks for the second type of memory. A track of the first plurality of tracks is demoted from the first type of memory, in response to determining that the track is a least recently used (LRU) track in a LRU list of tracks in the first type of memory and the track has been in the first type of memory for a time that exceeds the second minimum retention time.

說明書

The storage controller 102 allows the one or more hosts 106 to perform input/output (I/O) operations with logical storage maintained by the storage controller 102. The physical storage corresponding to the logical storage may be found in one or more of the storage devices 108, 110 and/or cache 104 (also referred to as a two-tier cache) of the storage controller 102.

The storage controller 102 and the hosts 106 may comprise any suitable computational device including those presently known in the art, such as, a personal computer, a workstation, a server, a mainframe, a hand held computer, a palm top computer, a telephony device, a network appliance, a blade computer, a processing device, a controller, etc. In certain embodiments, the storage controller 102 may be comprised of a plurality of servers. The plurality of servers may provide redundancy because if one server undergoes a failure from which recovery is not possible, an alternate server may perform the functions of the server that failed. Each of the plurality of servers may be referred to as a processing complex and may include one or more processors and/or processor cores.

The storage controller 102 and the one or more hosts 106 may be elements in any suitable network, such as, a storage area network, a wide area network, the Internet, an intranet. In certain embodiments, storage controller 102 and the one or more hosts 106 may be elements in a cloud computing environment.

權(quán)利要求

1
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