FIG. 3 illustrates a block diagram 300 that shows the eligibility for demotion of different types of tracks in any tier of cache, in accordance with certain embodiments.

Track M1 302 has no minimum retention time 304 indicated by the host application 120. As a result, track M1 302 is always eligible for demotion when track M1 302 reaches the LRU end of the LRU list 118 (as shown via reference numeral 314).

Track M2 306 has a minimum retention time 308 of 10 seconds indicated by the host application 120. As a result, track M2 306 is eligible for demotion if track M2 306 is in cache beyond 10 seconds or under certain predetermined conditions when the cache 104 is in danger of getting full (as shown via reference numeral 316).

Track M3 310 has a minimum retention time 312 of 15 seconds indicated by the host application 120. As a result, track M3 310 is eligible for demotion if track M3 310 is in cache beyond 15 seconds or under certain predetermined conditions when the cache 104 is in danger of getting full (as shown via reference numeral 318).

FIG. 4 illustrates a block diagram 400 that shows operations performed when minimum retention times for DRAM cache 112 and SCM cache 114 are provided by a host application 120, in accordance with certain embodiments.