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Integration of application indicated minimum time to cache for a two-tiered cache management mechanism

專利號(hào)
US11176057B2
公開(kāi)日期
2021-11-16
申請(qǐng)人
INTERNATIONAL BUSINESS MACHINES CORPORATION(US NY Armonk)
發(fā)明人
Lokesh Mohan Gupta; Matthew G. Borlick; Beth Ann Peterson; Kyler A. Anderson
IPC分類
G06F12/123; G06F12/0891; G06F12/0893
技術(shù)領(lǐng)域
cache,scm,retention,minimum,dram,tracks,track,lru,in,time
地域: NY NY Armonk

摘要

An indication is received from a host application of a first minimum retention time in a cache comprising a first type of memory and a second type of memory for a first plurality of tracks, wherein the first minimum retention time is not indicated for a second plurality of tracks. Based on the first minimum retention time, a second minimum retention time is set for the first plurality of tracks for the first type of memory and a third minimum retention time is set for the first plurality of tracks for the second type of memory. A track of the first plurality of tracks is demoted from the first type of memory, in response to determining that the track is a least recently used (LRU) track in a LRU list of tracks in the first type of memory and the track has been in the first type of memory for a time that exceeds the second minimum retention time.

說(shuō)明書(shū)

If at block 812 it is determined that the difference of the current time 138 from the timestamp of the track is not greater than the minimum retention time of the track (i.e., the track has not been in the DRAM cache for a time that exceeds the minimum retention time) [“No” branch 820] control proceeds to block 822 to determine whether the track should be demoted to prevent the DRAM cache 112 from becoming full.

At block 822 the cache management application 116 determines whether there are too many tracks with minimum retention time or too few tracks that are eligible for demotion from the cache that may cause the cache to become full. What is “too many” and what is “too few” is determined based on certain predetermined conditions, where some exemplary predetermined conditions are described later.

If at block 822 the cache management application 116 determines that there are too many tracks with minimum retention time or too few tracks that are eligible for demotion from the DRAM cache that may cause the DRAM cache to become full (“Yes” branch 824) then control proceeds to block 816 in which the track is demoted and the number of minimum retention time tracks is decremented (at block 818).

權(quán)利要求

1
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