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Integration of application indicated minimum time to cache for a two-tiered cache management mechanism

專利號(hào)
US11176057B2
公開(kāi)日期
2021-11-16
申請(qǐng)人
INTERNATIONAL BUSINESS MACHINES CORPORATION（US NY Armonk）
發(fā)明人
Lokesh Mohan Gupta; Matthew G. Borlick; Beth Ann Peterson; Kyler A. Anderson
IPC分類
G06F12/123; G06F12/0891; G06F12/0893
技術(shù)領(lǐng)域
cache,scm,retention,minimum,dram,tracks,track,lru,in,time
地域： NY NY Armonk

摘要

An indication is received from a host application of a first minimum retention time in a cache comprising a first type of memory and a second type of memory for a first plurality of tracks, wherein the first minimum retention time is not indicated for a second plurality of tracks. Based on the first minimum retention time, a second minimum retention time is set for the first plurality of tracks for the first type of memory and a third minimum retention time is set for the first plurality of tracks for the second type of memory. A track of the first plurality of tracks is demoted from the first type of memory, in response to determining that the track is a least recently used (LRU) track in a LRU list of tracks in the first type of memory and the track has been in the first type of memory for a time that exceeds the second minimum retention time.

說(shuō)明書(shū)

If at block 1122 the cache management application 116 determines that that neither are there too many tracks with minimum retention time nor are there too few tracks that are eligible for demotion from the SCM cache that may cause the SCM cache to become full (“No” branch 1126) then there is no danger of the SCM cache 114 becoming full and the cache management application 116 moves (at block 1128) the track to the MRU end of the LRU list 118 (i.e., the track is retained in the SCM cache 114 and moved to the MRU end of the LRU list 118).

Therefore, FIG. 11 illustrates certain embodiments in which tracks that are indicated as having a minimum retention time are preferred for storing in the SCM cache at least till the expiry of the minimum retention time unless the SCM cache 114 is in danger of becoming full.

FIG. 12 illustrates a flowchart 1200 that shows operations for promotion from SCM cache to DRAM cache, in accordance with certain embodiments.

權(quán)利要求

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