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Method for dicing integrated fan-out packages without seal rings

專利號(hào)
US11177142B2
公開(kāi)日期
2021-11-16
申請(qǐng)人
Taiwan Semiconductor Manufacturing Company, Ltd.(TW Hsinchu)
發(fā)明人
Li-Hsien Huang; Yueh-Ting Lin; An-Jhih Su; Ming Shih Yeh; Der-Chyang Yeh
IPC分類
H01L21/56; H01L23/31; H01L25/16; H01L21/683; H01L23/00; H01L25/00
技術(shù)領(lǐng)域
die,dicing,conductive,molding,packages,in,pillars,dielectric,package,structure
地域: Hsinchu

摘要

A method includes attaching a first die and a second die to a carrier; forming a molding material between the first die and second die; and forming a redistribution structure over the first die, the second die and the molding material, the redistribution structure includes a first redistribution region; a second redistribution region; and a dicing region between the first redistribution region and the second redistribution region. The method further includes forming a first opening and a second opening in the dicing region, the first opening and the second opening extending through the redistribution structure and exposing the molding material; and separating the first die and the second die by cutting through a portion of the molding material aligned with the dicing region from a second side of the molding material toward the first side of the molding material, the second side opposing the first side.

說(shuō)明書(shū)

In some embodiments, the conductive features of the redistribution structure 140 comprise conductive lines (e.g., 143) and conductive vias (e.g., 145) formed of a suitable conductive material such as copper, titanium, tungsten, aluminum, or the like. In some embodiments, the conductive features are formed by forming openings in a dielectric layer of the redistribution structure 140 to expose underlying conductive features, forming a seed layer (not shown) over the dielectric layer and in the openings, forming a patterned photoresist (not shown) with a designed pattern over the seed layer, plating (e.g., electroplating or electroless plating) the conductive material in the designed pattern and over the seed layer, and removing the photoresist and portions of seed layer on which the conductive material is not formed. Other methods of forming the redistribution structure 140 are also possible and are fully intended to be included within the scope of the present disclosure.

The number of dielectric layers and the number of layers of the conductive features in the redistribution structure 140 of FIG. 4 are merely non-limiting examples. Other numbers of the dielectric layers and other numbers of layers of the conductive features are also possible and are fully intended to be included within the scope of the present disclosure.

權(quán)利要求

1
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