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Method for dicing integrated fan-out packages without seal rings

專利號
US11177142B2
公開日期
2021-11-16
申請人
Taiwan Semiconductor Manufacturing Company, Ltd.(TW Hsinchu)
發(fā)明人
Li-Hsien Huang; Yueh-Ting Lin; An-Jhih Su; Ming Shih Yeh; Der-Chyang Yeh
IPC分類
H01L21/56; H01L23/31; H01L25/16; H01L21/683; H01L23/00; H01L25/00
技術(shù)領(lǐng)域
die,dicing,conductive,molding,packages,in,pillars,dielectric,package,structure
地域: Hsinchu

摘要

A method includes attaching a first die and a second die to a carrier; forming a molding material between the first die and second die; and forming a redistribution structure over the first die, the second die and the molding material, the redistribution structure includes a first redistribution region; a second redistribution region; and a dicing region between the first redistribution region and the second redistribution region. The method further includes forming a first opening and a second opening in the dicing region, the first opening and the second opening extending through the redistribution structure and exposing the molding material; and separating the first die and the second die by cutting through a portion of the molding material aligned with the dicing region from a second side of the molding material toward the first side of the molding material, the second side opposing the first side.

說明書

In an embodiment, a semiconductor package includes a lower package including a die and a conductive pillar proximate the die, the die and the conductive pillar being over a redistribution structure; and a molding material over the redistribution structure, the molding material being interposed between the die and the conductive pillar, the molding material extending beyond lateral extents of the redistribution structure. In an embodiment, a first portion of the molding material extending beyond the lateral extents of the redistribution structure has a first height, and a second portion of the molding material contacting the die has a second height, where the first height is smaller than the second height. In an embodiment, the semiconductor package further includes a top package electrically coupled to the conductive pillar.

The foregoing outlines features of several embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.

權(quán)利要求

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