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Method for dicing integrated fan-out packages without seal rings

專利號
US11177142B2
公開日期
2021-11-16
申請人
Taiwan Semiconductor Manufacturing Company, Ltd.（TW Hsinchu）
發(fā)明人
Li-Hsien Huang; Yueh-Ting Lin; An-Jhih Su; Ming Shih Yeh; Der-Chyang Yeh
IPC分類
H01L21/56; H01L23/31; H01L25/16; H01L21/683; H01L23/00; H01L25/00
技術領域
die,dicing,conductive,molding,packages,in,pillars,dielectric,package,structure
地域： Hsinchu

摘要

A method includes attaching a first die and a second die to a carrier; forming a molding material between the first die and second die; and forming a redistribution structure over the first die, the second die and the molding material, the redistribution structure includes a first redistribution region; a second redistribution region; and a dicing region between the first redistribution region and the second redistribution region. The method further includes forming a first opening and a second opening in the dicing region, the first opening and the second opening extending through the redistribution structure and exposing the molding material; and separating the first die and the second die by cutting through a portion of the molding material aligned with the dicing region from a second side of the molding material toward the first side of the molding material, the second side opposing the first side.

說明書

FIGS. 1-6, 7A, 7B, and 8-11 illustrate various views (e.g., cross-sectional view, top view) of a Package-on-Package (PoP) semiconductor package 500 at various stages of fabrication, in accordance with an embodiment. In particular, FIGS. 1-6, 7A, 7B and 8 illustrate various views of one or more bottom packages 1100 (e.g., 1100A, 1100B) of the PoP package, and FIGS. 9-11 illustrate cross-sectional views of the PoP package after top packages 160 (e.g., 160A, 160B) are attached to the bottom packages 1100.

Referring to FIG. 1, a dielectric layer 110, which may be buffer layer, is formed over a carrier 101. Conductive pillars 119 are formed over the dielectric layer 110.

The carrier 101 may be made of a material such as silicon, polymer, polymer composite, metal foil, ceramic, glass, glass epoxy, beryllium oxide, tape, or other suitable material for structural support. In some embodiments, the dielectric layer 110 is formed of a polymer, such as polybenzoxazole (PBO), polyimide, benzocyclobutene (BCB), or the like; a nitride such as silicon nitride; an oxide such as silicon oxide, phosphosilicate glass (PSG), borosilicate glass (BSG), boron-doped phosphosilicate glass (BPSG), or the like. The dielectric layer 110 may be formed by a suitable deposition process, such as spin coating, chemical vapor deposition (CVD), laminating, the like, or a combination thereof.

權利要求

1
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