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Method for dicing integrated fan-out packages without seal rings

專(zhuān)利號(hào)
US11177142B2
公開(kāi)日期
2021-11-16
申請(qǐng)人
Taiwan Semiconductor Manufacturing Company, Ltd.(TW Hsinchu)
發(fā)明人
Li-Hsien Huang; Yueh-Ting Lin; An-Jhih Su; Ming Shih Yeh; Der-Chyang Yeh
IPC分類(lèi)
H01L21/56; H01L23/31; H01L25/16; H01L21/683; H01L23/00; H01L25/00
技術(shù)領(lǐng)域
die,dicing,conductive,molding,packages,in,pillars,dielectric,package,structure
地域: Hsinchu

摘要

A method includes attaching a first die and a second die to a carrier; forming a molding material between the first die and second die; and forming a redistribution structure over the first die, the second die and the molding material, the redistribution structure includes a first redistribution region; a second redistribution region; and a dicing region between the first redistribution region and the second redistribution region. The method further includes forming a first opening and a second opening in the dicing region, the first opening and the second opening extending through the redistribution structure and exposing the molding material; and separating the first die and the second die by cutting through a portion of the molding material aligned with the dicing region from a second side of the molding material toward the first side of the molding material, the second side opposing the first side.

說(shuō)明書(shū)

Next, in FIG. 2, a semiconductor die 120 (may also be referred to a die, or an integrated circuit (IC) die) is attached to the upper surface of the dielectric layer 110. An adhesive film 118, such as a die attaching film (DAF), may be used to attach the die 120 to the dielectric layer 110.

Before being adhered to the dielectric layer 110, the die 120 may be processed according to applicable manufacturing processes to form integrated circuits in the die 120. For example, the die 120 may include a semiconductor substrate and one or more overlying metallization layers, collectively illustrated as element 121. The semiconductor substrate may be, for example, silicon, doped or undoped, or an active layer of a semiconductor-on-insulator (SOI) substrate. The semiconductor substrate may include other semiconductor materials, such as germanium; a compound semiconductor including silicon carbide, gallium arsenic, gallium phosphide, gallium nitride, indium phosphide, indium arsenide, and/or indium antimonide; an alloy semiconductor including SiGe, GaAsP, AlInAs, AlGaAs, GaInAs, GaInP, and/or GaInAsP; or combinations thereof. Other substrates, such as multi-layered or gradient substrates, may also be used. Devices (not shown), such as transistors, diodes, capacitors, resistors, etc., may be formed in and/or on the semiconductor substrate and may be interconnected by the metallization layers, e.g., metallization patterns in one or more dielectric layers over the semiconductor substrate, to form an integrated circuit.

權(quán)利要求

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