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Method of manufacturing a semiconductor device having redistribution layer including a dielectric layer made from a low-temperature cure polyimide

專利號
US11177165B2
公開日期
2021-11-16
申請人
Taiwan Semiconductor Manufacturing Company, Ltd.(TW Hsin-Chu)
發(fā)明人
Zi-Jheng Liu; Yu-Hsiang Hu; Hung-Jui Kuo
IPC分類
H01L21/768; H01L21/56; H01L23/498; H01L23/525; H01L23/532; H01L23/538; H01L23/31
技術(shù)領(lǐng)域
layer,may,in,be,ghi,polyimide,first,vias,thk,as
地域: Hsinchu

摘要

A method of manufacturing a semiconductor device includes the step of positioning a patterned mask over a dielectric layer. The dielectric layer comprises a low-temperature cure polyimide. The method further includes the steps of exposing a first surface of the dielectric layer through the patterned mask to an I-line wavelength within an I-line stepper, and developing the dielectric layer to form an opening.

說明書

PRIORITY CLAIM AND CROSS-REFERENCE

This application claims priority to and is a divisional of U.S. patent application Ser. No. 15/074,742 entitled “Semiconductor Device and Method” and filed on Mar. 18, 2016, which application is incorporated herein by reference.

BACKGROUND

The semiconductor industry has experienced rapid growth due to continuous improvements in the integration density of a variety of electronic components (e.g., transistors, diodes, resistors, capacitors, etc.). For the most part, this improvement in integration density has come from repeated reductions in minimum feature size (e.g., shrinking the semiconductor process node towards the sub-20 nm node), which allows more components to be integrated into a given area. As the demand for miniaturization, higher speed and greater bandwidth, as well as lower power consumption and latency has grown recently, there has grown a need for smaller and more creative packaging techniques of semiconductor dies.

As semiconductor technologies further advance, stacked and bonded semiconductor devices have emerged as an effective alternative to further reduce the physical size of a semiconductor device. In a stacked semiconductor device, active circuits such as logic, memory, processor circuits and the like are fabricated at least partially on separate substrates and then physically and electrically bonded together in order to form a functional device. Such bonding processes utilize sophisticated techniques, and improvements are desired.

BRIEF DESCRIPTION OF THE DRAWINGS

權(quán)利要求

1
What is claimed is:1. A method comprising:forming a first via over a first carrier;attaching a first semiconductor device over the first carrier adjacent the first via;forming a first encapsulant surrounding the first via and the first semiconductor device;planarizing the first via, the first semiconductor device, and the first encapsulant;forming a first redistribution passivation layer over the first semiconductor device and the first via;forming a second via extending through the first redistribution passivation layer to contact the first semiconductor device;forming a third via extending through the first redistribution passivation layer to contact the first via;planarizing the second via, the third via, and the first redistribution passivation layer;after planarizing the second via, the third via, and the first redistribution passivation layer, forming a first redistribution layer over and in contact with the second via, the third via, and the first redistribution passivation layer;forming a second redistribution passivation layer over the first redistribution passivation layer and the first redistribution layer, the second redistribution passivation layer comprising a polymer made up of monomers of the following formula:embedded imageexposing the second redistribution passivation layer to patterned I-line light;developing the second redistribution passivation layer to form an opening exposing the first redistribution layer; andforming a second redistribution layer in the opening, the second redistribution layer comprising a single continuous seed layer extending along an uppermost surface of the second redistribution passivation layer and contacting the first redistribution layer, wherein the second redistribution passivation layer comprises a single continuous layer surrounding and contacting sidewalls of the first redistribution layer and the second redistribution layer, and wherein a bottommost surface of the second redistribution passivation layer is level with a bottommost surface of the first redistribution layer.2. The method of claim 1, wherein the first redistribution passivation layer comprises PBO.3. The method of claim 2, wherein the second redistribution passivation layer comprises a low-temperature cured polyimide.4. The method of claim 3, wherein the first redistribution passivation layer is a positive tone material, and wherein the second redistribution passivation layer is a negative tone material.5. The method of claim 1, wherein the forming the second redistribution layer comprises curing the second redistribution layer at a temperature of less than 230° C.6. The method of claim 1, wherein the forming the second redistribution layer comprises baking the second redistribution passivation layer before the exposing the second redistribution passivation layer, wherein the baking is performed at a temperature of between 40° C. and 150° C., and wherein the baking drives off a solvent.7. The method of claim 1, wherein the forming the second redistribution layer comprises a post-exposure bake, wherein the post-exposure bake is performed after the exposing the second redistribution passivation layer and before the developing the second redistribution passivation layer, and wherein the post-exposure bake is performed at between 70° C. and 150° C.8. A method comprising:depositing a first polymer layer over a first carrier substrate;forming a first via over the first polymer layer;attaching a semiconductor device to the first polymer layer adjacent the first via;forming a first dielectric layer over the semiconductor device and the first via, the first dielectric layer comprising polybenzoxazole (PBO), wherein the PBO is a positive tone material;forming a first conductive redistribution layer extending through the first dielectric layer;forming a second dielectric layer over the first dielectric layer and the first conductive redistribution layer, the second dielectric layer comprising polymer made up of monomers of the following formula:embedded imagethe second dielectric layer having a constant composition throughout, wherein forming the second dielectric layer comprises:depositing the second dielectric layer over the first dielectric layer;curing the second dielectric layer at a temperature from 40° C. to 150° C. to remove at least one solvent component from the second dielectric layer;exposing the second dielectric layer to a patterned light of an I-line wavelength;after exposing the second dielectric layer to a patterned light, performing a post-exposure baking process at a temperature from 70° C. to 150° C. on the second dielectric layer;developing the second dielectric layer to form an opening extending to a top surface of the first conductive redistribution layer, wherein after the opening is formed, a top surface of the second dielectric layer comprises indentions adjacent the opening, wherein an angle of the indentions is between 2 degrees and 8 degrees; andafter developing the second dielectric layer to form the opening, performing a post-development baking process on the second dielectric layer;after performing the post-development baking process on the second dielectric layer, curing the second dielectric layer at a temperature from 200° C. to 230° C.;forming a via in the opening, the via contacting the first conductive redistribution layer and extending over the second dielectric layer, wherein top corners of the second dielectric layer adjacent the via are rounded in a range of 0.3 to 0.5 Π rad;removing the first carrier substrate from the first polymer layer;etching the first polymer layer to form a first opening exposing the first via; andforming a solder bump in the first opening and in contact with the first via.9. The method of claim 8, wherein sidewalls of the via have an angle of between 75 and 85 degrees.10. The method of claim 8, wherein the second dielectric layer comprises a negative tone, low-temperature cured polyimide.11. The method of claim 9, wherein when the second dielectric layer is deposited, the second dielectric layer comprises between 5% and 50% of the low-temperature cured polyimide and between 0.1% and 20% photoactive components (PACs).12. The method of claim 8, wherein the second dielectric layer is exposed to the I-line wavelength at between 60 and 185 mJ/cm2.13. The method of claim 8, wherein the second dielectric layer has a thickness of between 7 and 35 μm.14. A method comprising:forming a first redistribution via in a first redistribution passivation layer;planarizing the first redistribution via and the first redistribution passivation layer;after planarizing the first redistribution via and the first redistribution passivation layer, forming a first redistribution layer over the first redistribution via and the first redistribution passivation layer;after forming the first redistribution layer, forming a second redistribution passivation layer over the first redistribution layer and the first redistribution passivation layer, the second redistribution passivation layer comprising a topmost surface and an opposing bottommost surface, the topmost surface having indentions formed therein, wherein an angle of the indentions is between about 2 degrees and about 8 degrees, wherein the bottommost surface of the second redistribution passivation layer is level with a topmost surface of the first redistribution via, and wherein the second redistribution passivation layer comprises a polymer made up of monomers of the following formula:embedded imageforming a second redistribution layer extending through the second redistribution passivation layer, wherein the second redistribution layer is coupled to the first redistribution via, and wherein top corners of the second redistribution passivation layer adjacent the second redistribution layer are rounded in a range of approximately 0.3 to 0.5 Π rad, and wherein the second redistribution layer comprises a single continuous seed layer in physical contact with the first redistribution layer, sidewalls of the second redistribution passivation layer, and the topmost surface of the second redistribution passivation layer; andforming a third redistribution passivation layer over the second redistribution passivation layer and the second redistribution layer.15. The method of claim 14, further comprising forming an opening in the second redistribution passivation layer having sidewalls with angles greater than 75 degrees, wherein forming the second redistribution layer comprises filling the opening.16. The method of claim 15, wherein the angles of the sidewalls are less than 85 degrees.17. The method of claim 14, further comprising forming an opening in the second redistribution passivation layer, the opening having a width less than or equal to 15 microns, wherein forming the second redistribution layer comprises filling the opening.18. The method of claim 14, further comprising forming an opening in the second redistribution passivation layer, the opening having a mean target thickness of 7 microns, wherein forming the second redistribution layer comprises filling the opening.19. The method of claim 14, wherein the second redistribution passivation layer comprises a low-temperature cured polyimide.20. The method of claim 14, wherein the first redistribution passivation layer comprises polybenzoxazole (PBO).
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