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Method of manufacturing a semiconductor device having redistribution layer including a dielectric layer made from a low-temperature cure polyimide

專利號
US11177165B2
公開日期
2021-11-16
申請人
Taiwan Semiconductor Manufacturing Company, Ltd.（TW Hsin-Chu）
發(fā)明人
Zi-Jheng Liu; Yu-Hsiang Hu; Hung-Jui Kuo
IPC分類
H01L21/768; H01L21/56; H01L23/498; H01L23/525; H01L23/532; H01L23/538; H01L23/31
技術(shù)領(lǐng)域
layer,may,in,be,ghi,polyimide,first,vias,thk,as
地域： Hsinchu

摘要

A method of manufacturing a semiconductor device includes the step of positioning a patterned mask over a dielectric layer. The dielectric layer comprises a low-temperature cure polyimide. The method further includes the steps of exposing a first surface of the dielectric layer through the patterned mask to an I-line wavelength within an I-line stepper, and developing the dielectric layer to form an opening.

說明書

A singulation may be performed on the structure to form the first InFO-POP structure. In an embodiment the singulation may be performed by using a laser or a saw blade (not shown) to slice through the encapsulant 401 and the polymer layer 105 between the vias 111, thereby separating one section from another to form the first InFO-POP structure with the second semiconductor device 301. However, as one of ordinary skill in the art will recognize, utilizing a saw blade to singulate the first InFO-POP structure is merely one illustrative embodiment and is not intended to be limiting. Alternative methods for singulating the first InFO-POP structure, such as utilizing one or more etches to separate the first InFO-POP structure, may alternatively be utilized. These methods and any other suitable methods may alternatively be utilized to singulate the first InFO-POP structure.

FIG. 12 illustrates a bonding of a first package 700. In an embodiment the first package 700 may comprise a third substrate 701, a third semiconductor device 703, a fourth semiconductor device 705 (bonded to the third semiconductor device 703), third contact pads 707, a second encapsulant 709, and fourth external connections 711. In an embodiment the third substrate 701 may be, e.g., a packaging substrate comprising internal interconnects (e.g., through substrate vias 715) to connect the third semiconductor device 703 and the fourth semiconductor device 705 to the vias 111.

權(quán)利要求

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