A method of manufacturing a chip packaging structure of the disclosure includes the following steps: disposing a pre-molded chipset on a heat dissipation substrate; forming an interconnection to electrically connect the heat dissipation substrate and the pre-molded chipset; and forming a second encapsulant to cover part of the heat dissipation substrate, part or all of the interconnection, and part or all of the pre-molded chipset. The step of forming the pre-molded chipset includes: providing a thermally conductive substrate; disposing at least two chips on the thermally conductive substrate in which the at least two chips are thermally coupled to the thermally conductive substrate; forming a patterned circuit on the at least two chips, such that the at least two chips are electrically connected by the patterned circuit; and forming a first encapsulant to encapsulate the at least two chips and part or all of the patterned circuit.

Therefore, the chip packaging structure of the disclosure is formed by thermally coupling a chipset formed by pre-assembling the at least two chips to the thermally conductive substrate, packaging the thermally conductive substrate and the chipset into a pre-molded chipset by an encapsulant, and disposing the pre-molded chipset on the heat dissipation substrate. In this way, the heat concentration problem from a single chip architecture can be solved and the spreading resistance can be reduced in advance. In addition, the heat dissipation capability of chip packaging is effectively enhanced and the total cost of the used chips is reduced. Therefore, the performance of the chip can be improved and the service life of the chip can be increased while the total cost of the chip packaging structure is reduced.