It should be noted that although the combination of four three-terminal chips is shown in FIG. 2B, the combination mode of the chips 1220 of the disclosure is not limited thereto, and may be arranged according to actual design requirements. For example, in some embodiments, the at least two chips 1220 may all be three-terminal chips. In other embodiments, the at least two chips 1220 may all be two-terminal chips. In yet other embodiments, the at least two chips 1220 may include a combination of three-terminal chips and two-terminal chips.

In some embodiments, the chip 1220 may be a silicon carbide (SiC) or gallium nitride (GaN) wide bandgap semiconductor. Since the larger the size of the wide bandgap semiconductor chip, the lower the yield rate, the wide bandgap single large-sized chip has a disadvantage of being more expensive than multiple small-sized chips. As a result, the disposition of the chipset can more effectively reduce the total cost of the chip packaging structure including the wide bandgap chip, but the disclosure is not limited thereto.