FIG. 6 shows an example assembly flow including steps for forming a stacked die MCM power package described above as stacked die MCM power package 400 shown in FIG. 4A or stacked die MCM power package 450 shown in FIG. 4B. Step 601 comprises providing a leadframe including a die pad (such as the die pad 113 shown above) and a plurality of lead terminals, a first vertical FET such as HS FET 130, and a second vertical FET such as LS FET 140, wherein at least one of the first vertical FET and the second vertical FET include at least one side having a disclosed protruding surface standoff. As described above, the protruding surface standoffs can be formed while in wafer form during wafer fabrication operations, and are typically formed on both sides of the wafer including a plurality of the vertical semiconductor die.

As noted above, in one arrangement, the wafer fabrication sequence can utilize a thick passivation process that includes a first passivation process used to cover essentially the entire die and a second passivation process used to selectively increase the total thickness of the passivation in some areas of the die such as near the source (or drain) and gates terminals to be able to create disclosed protruding standoff(s). The respective passivation materials can comprise a polyimide, silica nitride, or silicon oxynitride. Another standoff formation process is to form the standoff(s) after the wafer fabrication, while still in wafer form. For example, by either depositing a polyimide material or any photo imageable material that can be deposited through spin coating or printing and curing by polymerization.