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Semiconductor package with solder standoff

專利號(hào)
US11177197B2
公開日期
2021-11-16
申請(qǐng)人
Texas Instruments Incorporated(US TX Dallas)
發(fā)明人
Jonathan Almeria Noquil; Satyendra Singh Chauhan; Lance Cole Wright; Osvaldo Jorge Lopez
IPC分類
H01L23/495; H01L23/00; H01L25/07; H01L25/00; H01L25/16; H01L21/56; H01L23/31
技術(shù)領(lǐng)域
die,fet,solder,clip,standoff,standoffs,vertical,protruding,package,leadframe
地域: TX TX Dallas

摘要

A semiconductor package includes a leadframe including a die pad and a plurality of lead terminals. A vertical semiconductor device is attached on a first side by a die attach material to the die pad. A first clip is on the first vertical device that is solder connected to a terminal of the first vertical device on a second side opposite to the first side providing a first solder bonded interface, wherein the first clip is connected to at least a first of the lead terminals. The first solder bonded interface includes a first protruding surface standoff therein that extends from a surface on the second side of the first vertical device to physically contact the first clip.

說明書

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As used herein the term “solder” includes conventional solder and solder derived from sintering a solder paste, whereas known in the art, solder paste is commonly applied to surface mount boards prior to pick and place, and when passed through an infra-red reflow machine, melts to provide the soldered joints. A disclosed aspect is to create a protruding standoff(s) on the surface of the vertical die that will maintain the BLT through the solder interface between the vertical die(s) and the clip. The standoff in one disclosed arrangement may provide an enclosure, such as being ring-shaped, but other disclosed arrangements may not provide an enclosure such as when the standoff is in the form of discrete posts, such as four posts with a post on all 4 corners of the vertical die, or six posts, depending on the specific die design. As used herein, a ‘ring’ means an enclosed shape such as being substantially circular such as elliptical, rectangular, or square. The height (thickness) of the standoff is generally at least equal to the solder thickness, and when the standoff is formed on the vertical die during wafer fabrication the dimensions (area and height) of the standoff can be more closely controlled due to better process control of deposition processes at the wafer/die level as compared to standoff formation during the assembly processing, such as standoffs formed by epoxy dispensing.

權(quán)利要求

1
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