The leadframe 110 includes a die pad 113 and a plurality of lead terminals with lead terminals 111 and 112 identified. The leadframe 110 generally comprises copper or a copper alloy. The semiconductor vertical die 140 is shown attached to the die pad 113 by a die attachment material shown as a solder bonded interface 191, that can also be a conductive epoxy die attach material. There is another solder bonded interface 192 between a top side of the vertical semiconductor die 140 in the clip 107. The clip 107 is shown coupled to lead terminal 112, with the solder for this connection shown in FIG. 1B described below as 194. Lead terminal 111 is connected by a bond wire 117 (e.g., a gold bond wire) to a terminal on the vertical semiconductor die 140 that in the case of a power FET die can be a gate terminal on its top side. For a conventional vertical power FET die, the die is a MOSFET die that has a gate and source terminal on the top side, and a drain terminal on its back side.

FIG. 1B is a cross-section view of the semiconductor package 100 shown in FIG. 1A again without the mold compound shown. The clip 107 is shown coupled to lead terminal 112 by a solder bonded interface 194. The solder standoffs on both sides of the vertical die 140 shown as 152 (on the top side) and 151 (on the back side) can clearly be seen in FIG. 1B that extend the full height of the solder bonded interface 191, 192, respectively.