Referring to the peripheral area PA of FIG. 3, a driving circuit including, for example, a first driver and a second driver, may be located on the lower substrate 100. The first driver may be the first light-emitting driving circuit 30, and the second driver may be the first scan driving circuit 20.

Each of the first scan driving circuit 20 and the first light-emitting driving circuit 30 may include TFTs and a wiring connected to the TFTs. The TFTs may be formed in the same process as that used to form the TFT 130 of the pixel circuit PC.

Each of the first scan driving circuit 20 and the first light-emitting driving circuit 30 may include an insulating layer located between elements (e.g., a semiconductor layer and a gate electrode) constituting the TFTs. For example, at least one of the buffer layer 101, the gate insulating layer 103, and the first and second interlayer insulating layers 105 and 107 may extend to the peripheral area PA to form an insulating layer 110. The insulating layer 110 includes an inorganic insulating material.

The first scan driving circuit 20 may be located closer to the display area DA than the first light-emitting driving circuit 30. As shown in FIG. 3, portions, portions of the first and second organic insulating layers 111 and 113 on the first scan driving circuit 20 may extend to the peripheral area PA to cover the first scan driving circuit 20. In some implementations, the first and second organic insulating layers 111 and 113 may not cover the first scan driving circuit 20, and only an inorganic insulating layer 109 may be located on the first scan driving circuit 20.