As shown in FIG. 3, the first thermally conductive layer 80 and the upper electrode 146 of the pixel circuit PC of the display area DA may be located on the same layer and may include the same material. In an embodiment, the first thermally conductive layer 80 and at least one of the data line DL of the pixel circuit PC, the upper electrode 146, and the gate electrode 136 may be located on the same layer and may include or be made of the same material.

The first thermally conductive layer 80 may be physically connected to the common power supply line 70 with a first connection layer 82 therebetween. As shown in FIG. 3, the first connection layer 82 and the data line DL of the pixel circuit PC are located on the same layer and include the same material. The first connection layer 82 may be located between the first light-emitting driving circuit 30 and the edge 100E of the lower substrate 100.

In a general method, a driver such as a first light-emitting driving circuit and a common power supply line are located in a region separate from a seal, unlike in the present disclosure, and thus a dead area that is a non-emitting portion may be increased.

In the present disclosure, a dead area may be reduced by locating the first light-emitting driving circuit 30 in the peripheral area PA to be under the common power supply line 70, thereby allowing the first light-emitting driving circuit 30 and the common power supply line 70 to overlap each other, and allowing the seal 400 to overlap at least a part of the common power supply line 70.