Devices, structures, materials and methods for vertical light emitting transistors and light emitting displays
地域：
CA
CA Escondido
摘要
Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.
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In other embodiments, OLETs and VPLETs that incorporate such transparent conductive electrode materials, such as NW networks, for use, for example, as supportive electrodes for the LETs and LEDs are provided. Embodiments of such electrode materials have now been discovered to exhibit equivalent or better figures of merit when compared to state-of-the art materials, such as ITO. In particular, as summarized in Table 1 above, in many embodiments NW networks, for example, including grids, meshes, etc., may be formed that demonstrate broad sheet resistances from 10Ω/sq to 300Ω/sq, in some embodiments less than 100Ω/sq, and in some embodiments less than 15Ω/sq; and high transmittance >75%, and in some embodiments >90%.
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