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Devices, structures, materials and methods for vertical light emitting transistors and light emitting displays

專利號(hào)
US11177465B2
公開日期
2021-11-16
申請(qǐng)人
Atom H2O, LLC(US CA Escondido)
發(fā)明人
Huaping Li
IPC分類
H01L33/00; H01L51/52; H01L51/56; H01L51/05; H01L27/15; H01L27/32; H01L33/06; H01L33/24; H01L33/28; H01L33/30; H01L33/32; H01L33/34; H01L33/40; H01L33/52; H01L51/00; H01L33/08
技術(shù)領(lǐng)域
nw,ag,vplets,electrode,conductive,electrodes,porous,emitting,dielectric,leps
地域: CA CA Escondido

摘要

Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.

說明書

LEPs (blue: PFO, green: super-yellow, red: MEH-PPV) have been fabricated into typical OLETs using thermal evaporated gold electrodes (70 nm thickness) with 20 pm channel length and 1000 μm channel width, and show a maximum power conversion efficiency of 0.002-0.005 Cd/A, an external quantum efficiency of 10-3, and a brightness <1000 Cd/m2 at supply and driving voltages of 150 V. Zwitteronic electron injection layers have also been developed for MEH-PPV OLEDs with a maximum power conversion efficiency of 1.1 Cd/A, and a brightness >12,000 Cd/m2. (See, e.g., H. P. Li, Y. Xu, 2009; and H. P. Li, Y. Xu, and G. C. Bazan, 2009, cited above.) VPLETs were also fabricated with LiF as a dielectric layer between two Al electrodes showing gate modulation, but no detailed information was provided on the VPLET's characterization. (See, e.g., Z. Xu, S. H. Li, L. Ma, G. Li and Y. Yang 2007, cited above.)

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