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Devices, structures, materials and methods for vertical light emitting transistors and light emitting displays

專利號
US11177465B2
公開日期
2021-11-16
申請人
Atom H2O, LLC(US CA Escondido)
發(fā)明人
Huaping Li
IPC分類
H01L33/00; H01L51/52; H01L51/56; H01L51/05; H01L27/15; H01L27/32; H01L33/06; H01L33/24; H01L33/28; H01L33/30; H01L33/32; H01L33/34; H01L33/40; H01L33/52; H01L51/00; H01L33/08
技術(shù)領(lǐng)域
nw,ag,vplets,electrode,conductive,electrodes,porous,emitting,dielectric,leps
地域: CA CA Escondido

摘要

Devices, structures, materials and methods for vertical light emitting transistors (VLETs) and light emitting displays (LEDs) are provided. In particular, architectures for vertical polymer light emitting transistors (VPLETs) for active matrix organic light emitting displays (AMOLEDs) and AMOLEDs incorporating such VPLETs are described. Porous conductive transparent electrodes (such as from nanowires (NW)) alone or in combination with conjugated light emitting polymers (LEPs) and dielectric materials are utilized in forming organic light emitting transistors (OLETs). Combinations of thin films of ionic gels, LEDs, porous conductive electrodes and relevant substrates and gates are utilized to construct LETs, including singly and doubly gated VPLETs. In addition, printing processes are utilized to deposit layers of one or more of porous conductive electrodes, LEDs, and dielectric materials on various substrates to construct LETs, including singly and doubly gated VPLETs.

說明書

  • disposing a first dielectric layer atop a first gate electrode, disposing one of either the drain or source electrode atop the first dielectric layer, disposing the light emitting layer atop the one of either the drain or source electrode disposed atop the first dielectric layer, disposing one of either the drain or source electrode atop the light emitting layer; disposing a second dielectric layer over the one of either the drain or source electrode disposed atop the light emitting layer, and disposing a second gate electrode atop the second dielectric layer;
  • disposing the dielectric layer atop the gate electrode, disposing one of either the drain or source electrode atop the dielectric layer, and disposing the light emitting layer atop a PEDOT coated ITO substrate that is further laminated with the one of either the drain or source electrode which is disposed atop the dielectric layer; and
  • disposing the dielectric layer atop the gate electrode, disposing one of either the drain or source electrode disposed atop the dielectric layer, disposing the light emitting layer atop the one of either the drain or source electrode disposed atop the dielectric layer, and disposing the light emitting layer that is laminated with the one of either the drain or source electrode not disposed atop the dielectric layer.
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