Target device 970 comprises a circular polarized dual mode slot antenna 987—the slots are on the back of the printed circuit board, as shown in FIG. 9H. As shown in FIG. 9G, RF signals received by antenna 987 are output to splitter 971, which outputs RF signals to filter 972. RF signals filtered by filter 982 are provided to a low-noise amplifier 973. RF signals output by the low-noise amplifier 973 are attenuated by attenuator 974 and, subsequently, amplified by amplifier 975. RF signals output by amplifier 975 are attenuated by attenuator 976 and, subsequently, amplified by amplifier 977. RF signals output by amplifier 977 are filtered by filter 978, attenuated by attenuator 979, and then are provided to frequency multiplier 980. Frequency multiplier 980 is configured to receive input signals having a center frequency of f0 (e.g., 5 GHz) and generate output signals having a center frequency that is 2f0 (e.g., 10 GHz) thereby operating as a frequency doubler.
Next, RF signals output by frequency multiplier 980 are attenuated by attenuator 981 and, subsequently, amplified by amplifier 982. RF signals amplified by amplifier 982 are filtered by filter 983, attenuated by attenuator 984, filtered by filter 985 and provided to splitter 986. Splitter 986 is coupled to dual mode slot antenna 987 and provides RF signals to the dual mode slot antenna for transmission. Splitter 986 splits the RF signals to generate two 90-degree out of phase RF signals (sometimes termed “in-phase” and “quadrature” signals) and provides these signals to dual mode slot antenna 987.