Chip-scale radio-frequency localization devices and associated systems and methods
摘要
說(shuō)明書(shū)
The control circuitry 210 may obtain any of the above-described information from the interrogators onboard PCB 204 in any suitable way. For example, in some embodiments, information may be transmitted across the PCB 204 using a low-bandwidth analog signal (e.g., using a single-ended analog line, a shielded line, or a different line pair). As another example, in some embodiments, information may be transmitted across the PCB 204 using digital lines (e.g., when the interrogators have built-in analog-to-digital converters). In some embodiments, each of the interrogators may include double-buffered random access memory (RAM). The double buffered RAM on an interrogator may be read out (to provide data to the control circuitry 210), while the interrogator is acquiring its next waveform. As such, using double-buffered RAM would enable the system 200 to operate at a high rate. The control circuitry 210 may be implemented in any suitable way and, for example, may be implemented as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a combination of logic circuits, a microcontroller, or a microprocessor.
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